Arithmetic Logic Unit

logic-circuits computer-architecture

Definition

Arithmetic Logic Unit

An arithmetic logic unit is a combinational circuit in a processor that applies one selected arithmetic or logical operation to its inputs.

Typical operations are addition, subtraction, AND, and OR. The selected operation is determined by control signals.

Control

The ALU takes two inputs $A$ and $B$ together with a control signal that selects the operation.

Control signal	Function
$00$	Addition
$01$	Subtraction
$10$	AND
$11$	OR

Flags

An ALU can also output status flags that summarise properties of the result.

Flag	Meaning
$N$	the result is negative
$Z$	the result is zero
$C$	the adder produces a carry out
$V$	signed overflow occurs

Implementation

One adder for addition and subtraction

A common implementation reuses one full adder for both addition and subtraction.

The key identity is:

$$A-B=A+\bar{B}+1$$

So the circuit can:

• pass $B$ unchanged for addition;
• pass $\bar{B}$ for subtraction;
• use the control bit as the carry-in.

This lets one adder implement both operations.

Adding status flags

The ALU can be extended so that it outputs the flags together with the main result.

Overflow logic

The overflow flag is the most subtle part.

The logic can be read step by step.

1. The right-most gate enables the overflow logic only for addition and subtraction.

   

2. The middle gate checks whether the sign bit of the result differs from the sign bit of $A$.

   

3. The left XNOR gate captures the sign pattern that can overflow:

   • for addition, overflow is possible only when $A$ and $B$ have the same sign;
   • for subtraction, overflow is possible only when $A$ and $B$ have different signs.

   

Putting these conditions together yields the signed overflow flag $V$.