Definition
Interrupt
Mechanism
Upon receiving an interrupt, the system follows a specific sequence to handle the event while preserving the state of the interrupted process:
- Hardware Handover: The CPU completes the current instruction, saves the program counter and PSW onto the system stack, and loads a new PC from the interrupt vector Hardware.
- Context Save: The OS saves all general-purpose registers and sets up a new stack for the handler Assembly code.
- Service Routine: The specific interrupt service routine (ISR) executes (e.g., reading data from a keyboard buffer) C code.
- Scheduling: The OS scheduler decides which process should run next (this may trigger a process switch) C code.
- Context Restore: The OS restores the registers and prepares the CPU to resume execution of the selected process Assembly code.