Definition
Interrupt
Mechanism
Interrupt Handling Sequence
- Hardware: CPU completes current instruction, saves PC and PSW to system stack, loads new PC from interrupt vector
- Context Save: OS saves registers, sets up handler stack
- Service Routine: Interrupt service routine (ISR) executes
- Scheduling: OS decides next process (may trigger process switch)
- Context Restore: OS restores registers, resumes selected process
Sources
Timer Interrupts
Used by the OS for timeouts and preemptive multitasking.
I/O Interrupts
Signals from devices (keyboard, network, disk) indicating operation completion or data availability.
Hardware Failures
Power loss, memory parity errors, or other critical hardware events.