P-MOS

electronics transistors mosfet

P-MOS

A P-MOS transistor is a P-channel MOSFET where the channel consists of holes as majority carriers. It operates in enhancement mode: applying a negative gate-source voltage $V_{GS}<V_{th}$ (where $V_{th}<0$) creates an inversion layer, forming a conducting channel between source and drain.

Structure

Substrate: n-type semiconductor (lightly doped). Source/Drain: Heavily doped p+ regions diffused into the substrate. Gate: Metal or polysilicon electrode separated from the substrate by a thin oxide layer. Channel: Forms beneath the gate when $V_{GS}<V_{th}$ (negative threshold).

Operation

Off State ($V_{GS}>V_{th}$): No conducting channel exists; drain current $I_D\approx 0$. The transistor acts as an open switch.

On State ($V_{GS}<V_{th}$): Negative gate voltage attracts holes to the surface, creating a p-type inversion layer (channel) connecting source to drain. Current flows from source (higher potential) to drain (lower potential).

Example

Consider a P-MOS with $V_{th}=-0.7\text{V}$:

Condition	$V_{GS}$	State	$I_D$
$V_G=3.3\text{V}$, $V_S=3.3\text{V}$	$0\text{V}$	Off	$\approx 0$
$V_G=0\text{V}$, $V_S=3.3\text{V}$	$-3.3\text{V}$	On	$>0$

When used as a high-side switch: source connected to $V_{DD}$ (e.g., $3.3\text{V}$), gate driven low ($0\text{V}$) to turn on, allowing current to flow to the load at the drain.