risc-v

Definition

S-Type Instruction (RISC-V)

An S-type instruction encodes a store operation with one source register and a split immediate offset that is combined during decoding.

Synopsis

S-type instructions use one source register (rs2) and a split immediate offset (imm$_{11:5}$ and imm$_{4:0}$).

The remaining fields provide the operation encoding:

  • rs1 names the base register.
  • funct3 selects the specific store operation.
  • op identifies the instruction as an S-type instruction.