risc-v Definition addi (RISC-V) Adds the value of register b and the sign-extended 12-bit immediate imm, storing the result in register a. The sign-extension behaviour is described in sign extension. addi a, b, imm Equivalent C code: a = b + imm Examples Example 1 How to realise the following C code in RISC-V, given that there’s no move instruction? int a = -372; int b = a + 6; Solution: We can use the addi instruction together with the zero register: # s0 = a, s1 = b addi s0, zero, -372 addi s1, s0, 6