D Latch

logic-circuits

Definition

D Latch

A D latch takes two inputs $CLK$ (clock), controlling when the output changes, and $D$ (data), controlling to what the output changes to.

¹

The simplified symbol of the D latch is:

D latches avoid the case when $Q\ne \text{NOT }\bar{Q}$ of SR latches.

Truth Table

$CLK$	$D$	$\bar{D}$	$S$	$R$	$Q$	$\bar{Q}$
$0$	$X$	$\bar{X}$	$0$	$0$	$Q_{prev}$	${\bar{Q}}_{prev}$
$1$	$0$	$1$	$0$	$1$	$0$	$1$
$1$	$1$	$0$	$1$	$0$	$1$	$0$

Footnotes

1. Digital Design and Computer Architecture - RISC-V Edition ↩