It maintains a global history register — a shift register of the last m branch outcomes — and uses this history to index a pattern history table of 2-bit saturating counters. Because the history captures correlations between different branches, a global predictor can exploit patterns like if branch A is taken, branch B is likely not taken.
Examples
1-Bit Branch Prediction
Consider a 1-bit global predictor for the following code:
For the inner loop (L09), we have a branch pattern:
T−T−T−NT
and a nested loop pattern:
(T−T−T−NT)T(T−T−T−NT)T…
We know that L09 loops for four iterations. The low bit of the PC for L09 and L11 happens to be the same, so both branches alias to the sameBHT entry. With a 1-bit predictor, a single shared counter governs all predictions. At start, the shared entry is PNT (predict not taken).
Misprediction rate 5 branches (4 inner +1 outer). In the first iteration we mispredict 2 of them (the first L09 and the L11). After L11, the shared counter is back at PT, so subsequent outer iterations start with a correct prediction for the first L09, giving ∼40% misprediction rate overall.
Per outer loop iteration we execute
2-Bit Branch Prediction
Now replace the 1-bit counter with a 2-bit saturating counter. States: PWNT (weakly NT), PWT (weakly T), PST (strongly T). Same aliasing setup — L09 and L11 share one entry. Start: BHT = PWNT.
Hysteresis at work 2/5). After the first iteration the counter sits at PST (strongly T). In subsequent outer loops, only the inner loop exit is mispredicted (Y Y Y N Y — 1/5). The 2-bit predictor converges to a better steady state than the 1-bit case because hysteresis prevents a single NT from flipping the prediction all the way back to NT — it only drops from PST to PWT, still in taken territory.
The first iteration mispredicts only the first and fourth L09 (N Y Y N Y —