Definition
1-Bit Branch Predictor
A 1-bit branch predictor is an n-bit branch predictor with , giving exactly two states: predict not taken and predict taken.
The prediction is simply the last outcome of that branch. If the branch was taken last time, it is predicted taken; if it was not taken, it is predicted not taken.
Because there is no hysteresis, the prediction flips after every misprediction. In a loop that is taken times and then falls through once, a 1-bit predictor mispredicts twice per loop iteration — once on the exit and once on the first iteration of the next entry.
High Sensitivity
The 1-bit predictor has a fundamental problem: a single different outcome flips the prediction entirely. If a branch is taken times in a row, the predictor settles on T — but one not taken exit flips it immediately to NT. On the next encounter, that lone NT causes a misprediction, flipping it back to T.
Too reactive
The predictor tracks the last outcome, not the majority outcome. A branch that is mostly taken still flips to NT after every loop exit, even though the long-term trend is strongly taken.
The root cause is the lack of hysteresis — a single counter bit gives only two states, so every misprediction toggles the prediction. The solution is to widen the counter:
- With 2 bits, the counter has four states, giving two degrees of taken and two degrees of not taken. A single anomalous outcome weakens the prediction but does not reverse it.
- This is the 2-bit saturating counter — the natural fix for the 1-bit predictor’s oversensitivity.