Lukas' Notes
Search
Search
Dark mode
Light mode
Tag: computer-architecture
171 items with this tag.
1-Bit Branch Predictor
computer-architecture
2-Bit Branch Predictor
computer-architecture
Address Compute Unit
computer-architecture
Addressing Mode
computer-architecture
Always Not Taken Branch Prediction
computer-architecture
Always Taken Branch Prediction
computer-architecture
Amdahl's Law
computer-architecture
parallelism
Arithmetic Logic Unit
logic-circuits
computer-architecture
ARM
computer-architecture
Associative Cache
computer-architecture
memory
Atomic Operation
computer-architecture
concurrency
Average Memory Access Time
computer-architecture
Big-Endian
computer-architecture
memory
Blocking Load Instruction
computer-architecture
Branch (Computer Architecture)
computer-architecture
Branch Instruction
computer-architecture
Branch Misprediction Penalty
computer-architecture
Branch Prediction
computer-architecture
Branch Predictor
computer-architecture
Cache
computer-architecture
memory
Cache Associativity
computer-architecture
memory
Cache Coherence
computer-architecture
Cache Miss
computer-architecture
memory
Cache Miss Penalty
computer-architecture
memory
Cache Replacement Policy
computer-architecture
memory
Cache Set
computer-architecture
memory
Cache Set Contention
computer-architecture
memory
Cache Write-Hit
computer-architecture
memory
Cache Write-Miss
computer-architecture
memory
Calling Convention (x86-64)
computer-architecture
Capacity Cache Miss
computer-architecture
memory
Clock Cycle (Computer Architecture)
computer-architecture
Clock Edge
computer-architecture
Clock Period
computer-architecture
Clock Rate
computer-architecture
Coarse-Grained Hardware Multi-Threading
computer-architecture
Commit Stage
computer-architecture
compare_exchange_strong (C++)
computer-architecture
concurrency
cpp
Complete Stage
computer-architecture
Complex Instruction Set Computing
computer-architecture
Computer Architecture
computer-architecture
Computer System
computer-architecture
Conflict Cache Miss
computer-architecture
memory
Control Hazard
computer-architecture
Control Unit
computer-architecture
CVA6
computer-architecture
risc-v
Cycles Per Instruction
computer-architecture
Data Cache
computer-architecture
memory
Data Hazard
computer-architecture
Data Memory
computer-architecture
Decode Stage
computer-architecture
Digital Circuit
computer-architecture
Direct-Mapped Cache
computer-architecture
memory
Double Data Rate Synchronous Dynamic Random-Access Memory
computer-architecture
memory
Dynamic Branch Prediction
computer-architecture
Dynamic Random-Access Memory
computer-architecture
memory
Endianness
computer-architecture
memory
ESP32-C3
computer-architecture
risc-v
Execute Stage
computer-architecture
Fetch Stage
computer-architecture
Fine-Grained Hardware Multi-Threading
computer-architecture
First-In-First-Out Memory Replacement Policy
computer-architecture
memory
Forwarding
computer-architecture
Fully Associative Cache
computer-architecture
memory
Functional Unit
computer-architecture
Global Branch Predictor
computer-architecture
Hardware Multi-Threading
computer-architecture
Hardware State Machine
computer-architecture
risc-v
Hardware Thread
computer-architecture
High Bandwidth Memory
computer-architecture
memory
In-Order Pipelined Processor
computer-architecture
Instruction Cache
computer-architecture
memory
Instruction Cache Miss
computer-architecture
memory
Instruction Level Parallelism
computer-architecture
Instruction Memory
computer-architecture
memory
processor-design
Instruction Prefetching
computer-architecture
memory
Instruction Set
computer-architecture
Instruction Set Architecture
computer-architecture
Instruction-Level Parallelism
computer-architecture
Instructions Per Cycle
computer-architecture
Interleaving Graph
concurrency
computer-architecture
Issue Stage
computer-architecture
L1 Cache
computer-architecture
memory
L2 Cache
computer-architecture
memory
L3 Cache
computer-architecture
memory
Least Recently Used Memory Replacement Policy
computer-architecture
memory
Little-Endian
computer-architecture
memory
Load Instruction
computer-architecture
Load Queue
computer-architecture
Load Unit
computer-architecture
Load-Reserved Store-Conditional
computer-architecture
concurrency
memory-models
Load-Store Unit
computer-architecture
Local Branch Predictor
computer-architecture
Main Memory
computer-architecture
memory
Memory (Cognitive Architecture)
computer-architecture
memory
Memory Access
computer-architecture
Memory Access Stage
computer-architecture
Memory Array
computer-architecture
memory
Memory Controller
computer-architecture
memory
Memory Locality
computer-architecture
memory
Memory Ordering Violation
computer-architecture
Memory Replacement Policy
computer-architecture
memory
Memory System
computer-architecture
Microarchitecture
computer-architecture
Multi-Core Memory System
computer-architecture
Multi-Core Processor
computer-architecture
Multi-cycle Instruction
computer-architecture
Multi-Cycle Processor
computer-architecture
Multi-Cycle Processor (RISC-V)
computer-architecture
risc-v
Multi-level Cache
computer-architecture
memory
n-Bit Branch Predictor
computer-architecture
N-Way Set Associative Cache
computer-architecture
memory
Non-blocking Load Instruction
computer-architecture
Open Multi-Processing
operating-systems
computer-architecture
Out-of-Order Pipelined Processor
computer-architecture
Parallelism (Computer Architecture)
computer-architecture
Pipeline
computer-architecture
Pipeline Stage
computer-architecture
Pipelined Functional Unit
computer-architecture
Pipelined Hazard
computer-architecture
Pipelined Processor
computer-architecture
Predicted Branch
computer-architecture
Privilege Ring
operating-systems
computer-architecture
Processor
operating-systems
hardware
computer-architecture
Processor Core
computer-architecture
Random-Access Memory
computer-architecture
memory
Read-after-Write Dependency
computer-architecture
Read-only Memory
computer-architecture
memory
Reduced Instruction Set Computing
computer-architecture
Register File
computer-architecture
Register Renaming
computer-architecture
Relaxed Memory Model
computer-architecture
memory-models
Release-Acquire Memory Model
computer-architecture
memory-models
Rename Stage
computer-architecture
RISC-V
computer-architecture
risc-v
RISC-V A-Extension
computer-architecture
risc-v
Sequential Circuit
computer-architecture
Serial Functional Unit
computer-architecture
Set-Associative Cache
computer-architecture
memory
Simultaneous Multi-Threading
computer-architecture
Single-cycle Instruction
computer-architecture
Single-Cycle Processor
computer-architecture
Single-Cycle Processor (RISC-V)
computer-architecture
risc-v
todo
Spatial Cache Locality
computer-architecture
memory
Spatial Memory Locality
computer-architecture
memory
Spatial Parallelism (Computer Architecture)
computer-architecture
Spinlock
operating-systems
concurrency
computer-architecture
Stack Frame
computer-architecture
operating-systems
Static In-order Scheduling
computer-architecture
Static In-order Scheduling with Load-Store Optimization
computer-architecture
Static In-order Scheduling with Pipelined Functional Units
computer-architecture
Static Random-Access Memory
computer-architecture
memory
Store Buffer
computer-architecture
Store Instruction
computer-architecture
Store Unit
computer-architecture
Structural Hazard
computer-architecture
Superscalar Pipelined Processor
computer-architecture
Synchronous Processor (Computer Architecture)
computer-architecture
System Bus
computer-architecture
Temporal Locality Compulsory Cache Miss
computer-architecture
memory
Temporal Memory Locality
computer-architecture
memory
Temporal Parallelism (Computer Architecture)
computer-architecture
Thread-Level Parallelism
computer-architecture
Token (Computer Architecture)
computer-architecture
Very Long Instruction Word Processor
computer-architecture
Write-after-Read Dependency
computer-architecture
Write-after-Write Dependency
computer-architecture
Write-Back Stage
computer-architecture
x86
computer-architecture
x86-64
computer-architecture
x86-64 Instruction
computer-architecture
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
Page 1 of 18