Definition
In-Order Pipelined Processor
An in-order pipelined processor is a pipelined processor in which instructions are issued, executed, and completed strictly in program order.
If an instruction stalls, all later instructions also stall, even when they are independent of the stalled instruction.
Stall propagation
In an in-order pipelined processor, a pipelined hazard that stalls one pipeline stage blocks all later stages. An instruction cannot overtake an earlier instruction, even if it is ready to proceed.
A single data hazard or cache miss therefore stalls the entire pipeline, including independent work that could otherwise continue.
Precise exceptions
Because results are written back in program order, an in-order pipelined processor guarantees precise exceptions. When an instruction raises an exception, all earlier instructions have completed and no later instruction has modified architectural state.