Lukas' Notes

Instruction

May 01, 20261 min read

operating-systems


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Backlinks

  • Branch (Computer Architecture)
  • Branch Instruction
  • Branch Misprediction Penalty
  • Cache Miss
  • Control Hazard
  • Data Cache
  • Data Hazard
  • Decode Stage
  • Execute Stage
  • Fetch Stage
  • Instruction Cache
  • Main Memory
  • Memory System
  • Memory
  • Microarchitecture
  • Pipeline Stage
  • Pipelined Processor
  • Program Counter
  • Random-Access Memory
  • Static Branch Prediction

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