Lukas' Notes

computer-architecture

Definition

Blocking Load Instruction

A blocking load instruction is a load instruction that stalls the pipeline until the requested data returns from the memory system.

All later instructions are blocked, regardless of whether they depend on the loaded value. The pipeline cannot proceed past the load until the data arrives.

Behaviour

In a static in-order pipeline, every load is effectively blocking. The load occupies the memory access stage, and if the data misses in the data cache, the stall back-propagates through all earlier pipeline stages.

A load-use hazard is the shortest blocking case: even on a cache hit, a dependent instruction stalls for one cycle while the loaded value is forwarded. On a cache miss, the stall lasts the full miss penalty.

A non-blocking load avoids this stall by allowing independent instructions to proceed past the load.