computer-architecture memory

Definition

Cache Miss

A cache miss occurs when the processor accesses data or an instruction that is not currently stored in the cache. The requested block must then be fetched from a lower level of the memory hierarchy, such as main memory. Cache misses therefore increase access time compared with a cache hit.

Misses

Temporal Locality Compulsory Miss

Definition

Temporal Locality Compulsory Cache Miss

A temporal locality compulsory cache miss is a cache miss that occurs on the first access to a block, before temporal memory locality can be exploited.

Since the block has not been loaded into the cache before, the access must miss even if the cache has enough capacity and there are no conflicts.

Such misses are therefore caused by the first reference to a block, not by replacement or set contention.

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Conflict Miss

Definition

Conflict Cache Miss

A conflict cache miss is a cache miss that occurs because multiple memory blocks map to the same cache set and cannot all stay in the cache at the same time.

Such misses arise from set contention, not because the cache is empty on first use and not because the total cache capacity is too small.

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