Write-after-Write Dependency

computer-architecture

Definition

Write-after-Write Dependency

A write-after-write (WAW) dependency (also output dependency) is a data hazard in which two instructions write to the same register.

$$I_1:\text{write}(r)I_2:\text{write}(r)\text{with }{I}_1{\prec }_{\text{prog}}{I}_2$$

$I_2$ must not overtake $I_1$ in the pipeline. If $I_2$ writes its result before $I_1$, the architectural register holds the wrong value — the value from $I_1$ instead of the value from $I_2$.

This is a false dependency: neither instruction reads the value produced by the other. The conflict arises only because both instructions share the same register name. Register renaming eliminates WAW hazards by assigning each write a distinct physical register.

Examples

LW / LI Pair

LW  a1, 0(a2)    # writes a1
LI  a1, 4        # writes a1

Both instructions target a1. If LI completes before LW (e.g. due to a cache miss on the load), the register holds 4 instead of the loaded value.

Vector Addition Loop

Consider a loop body that computes $\mathbf{c}=\mathbf{a}+\mathbf{b}$:

LW  t1, 0(a0)     # writes t1
LW  t2, 0(a1)     # writes t2
ADD t1, t1, t2    # writes t1
SW  t1, 0(a2)
ADDI a0, a0, 4
ADDI a1, a1, 4
ADDI a2, a2, 4
ADDI t0, t0, 1
BLTU t0, t3, vec_add_for

One WAW dependency exists:

Write	Write	Register
LW t1, 0(a0)	ADD t1, t1, t2	t1

The register t1 is reused: first to hold a[i], then to hold the sum a[i] + b[i]. In out-of-order execution, ADD must not write its result before LW completes.