Definition
Rename Stage
The rename stage is the pipeline stage in which architectural register names are mapped to physical register names.
Each write to an architectural register receives a fresh physical register. This eliminates write-after-read and write-after-write hazards, because independent writes to the same architectural register no longer share a storage location.
Read-after-write hazards are untouched, since they represent true dataflow.
Mechanism
A rename table maps each architectural register to the most recent physical register allocated for it. When an instruction writes a register, the rename stage:
- allocates a new physical register from a free list,
- records the mapping in the rename table,
- passes the physical register number to later stages.
A read of an architectural register is translated to the physical register currently mapped.
Effect
Register renaming resolves false dependencies without altering program semantics. The same architectural register can be written by independent instructions simultaneously in a superscalar or out-of-order pipeline, because each write goes to a different physical register.