Lukas' Notes

Privileged Instruction (RISC-V)

May 01, 20261 min read

risc-v

Definition

Privileged Instruction (RISC-V)

A privileged instruction is a RISC-V instruction that accesses control and status registers or performs other privileged processor operations.

These instructions are executed in a privileged mode, such as machine mode. Attempting to execute them in a lower privilege mode can cause a trap.

Examples include csrr, csrw, csrrw, and mret.


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